Difference between revisions of "LPC Debug Port"
| Line 22: | Line 22: | ||
The '''LPC Debug Port''' is an unpopulated 2x8 2.54mm (0.1") footprint on the Xbox motherboard that provides access to the system's [https://en.wikipedia.org/wiki/Low_Pin_Count Low Pin Count] Bus, as well as the [[SMBus]]. Throughout the Xbox's lifetime, Microsoft modified the LPC port in an attempt to prevent modding and, in some cases, it must be "rebuilt" to restore the port's full functionality. Rebuilding the LPC debug port involves soldering wires between it and very small vias on the motherboard. | The '''LPC Debug Port''' is an unpopulated 2x8 2.54mm (0.1") footprint on the Xbox motherboard that provides access to the system's [https://en.wikipedia.org/wiki/Low_Pin_Count Low Pin Count] Bus, as well as the [[SMBus]]. Throughout the Xbox's lifetime, Microsoft modified the LPC port in an attempt to prevent modding and, in some cases, it must be "rebuilt" to restore the port's full functionality. Rebuilding the LPC debug port involves soldering wires between it and very small vias on the motherboard. | ||
| + | |||
| + | The LPC bus is controlled by the [[MCPX MCPX southbridge]], which conforms to the Intel Low Pin Count Specification 1.0. | ||
== Pins == | == Pins == | ||
| Line 35: | Line 37: | ||
* '''LFRAME#''' (3) - LPC start-of-cycle signal. | * '''LFRAME#''' (3) - LPC start-of-cycle signal. | ||
* '''LCLK''' (2) - 33MHz LPC clock signal; same as PCICLK. | * '''LCLK''' (2) - 33MHz LPC clock signal; same as PCICLK. | ||
| + | |||
| + | The debug port lacks the optional LDRQ#, SERIRQ, CLKRUN#, PME#, LPCPD#, and LSMI# signals. This means peripherals connected to the debug port cannot utilize interrupt, DMA, bus mastering, or power management features. | ||
Revision as of 17:25, 30 December 2017
| Name | Pin | Pin | Name |
|---|---|---|---|
| - | 16 | 15 | 3.3V |
| SDA | 14 | 13 | SCL |
| GND | 12 | 11 | LAD0 |
| LAD1 | 10 | 9 | 3.3V |
| LAD2 | 8 | 7 | LAD3 |
| 5V | 6 | 5 | LRESET# |
| PWR (v1.6) | 4 | 3 | LFRAME# |
| GND | 2 | 1 | LCLK |
The LPC Debug Port is an unpopulated 2x8 2.54mm (0.1") footprint on the Xbox motherboard that provides access to the system's Low Pin Count Bus, as well as the SMBus. Throughout the Xbox's lifetime, Microsoft modified the LPC port in an attempt to prevent modding and, in some cases, it must be "rebuilt" to restore the port's full functionality. Rebuilding the LPC debug port involves soldering wires between it and very small vias on the motherboard.
The LPC bus is controlled by the MCPX MCPX southbridge, which conforms to the Intel Low Pin Count Specification 1.0.
Pins
- 3.3V (15 & 9) - Provides 3.3V while the Xbox is powered on.
- SDA (14) - SMBus data and address signal.
- SCL (13) - SMBus clock signal.
- GND (12 & 2) - Ground.
- LAD[3:0] (11, 10, 8, 7) - LPC address and data signals.
- 5V (6) - Provides 5V while the Xbox is plugged in.
- LRESET# (5) - LPC reset signal; same as PCIRST#.
- PWR (4) - On pre-1.6 hardware, this pin does not physically exist. On 1.6 hardware, this pin is connected to the power button. Shorting it to ground will turn the Xbox on and off.
- LFRAME# (3) - LPC start-of-cycle signal.
- LCLK (2) - 33MHz LPC clock signal; same as PCICLK.
The debug port lacks the optional LDRQ#, SERIRQ, CLKRUN#, PME#, LPCPD#, and LSMI# signals. This means peripherals connected to the debug port cannot utilize interrupt, DMA, bus mastering, or power management features.
