Difference between revisions of "USB"
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== USB Host Controllers == | == USB Host Controllers == | ||
Xbox hardware contains two OHCI USB Host controllers within the MCPX southbridge. The two controllers are designated USB0 and USB1. | Xbox hardware contains two OHCI USB Host controllers within the MCPX southbridge. The two controllers are designated USB0 and USB1. | ||
− | On retail consoles USB0 is connected to the 4 front panel game controller ports. Although USB1 is available, it is not enabled in retail titles and it is not mapped out of the MCPX, so it is difficult | + | On retail consoles USB0 is connected to the 4 front panel game controller ports. Although USB1 is available, it is not enabled in retail titles and it is not mapped out of the MCPX, so it is difficult to use in homebrew. |
The USB controllers are configured and accessed over MMIO. See https://xboxdevwiki.net/Memory. The memory structure follows the standard OHCI specification (OHCI Spec Table 7-1). | The USB controllers are configured and accessed over MMIO. See https://xboxdevwiki.net/Memory. The memory structure follows the standard OHCI specification (OHCI Spec Table 7-1). | ||
− | + | * USB0 is on PCI Bus 0, device 2, function 0 and is connected to IRQ1. | |
+ | * USB1 is on PCI Bus 0, device 3, function 0 and is connected to IRQ9. | ||
− | Xbox hardware has the following specific OHCI register values set by the system firmware that may differ from the standard: | + | OHCI supports USB devices up to USB1.1 12Mbit/s. OHCI also supports Low Speed USB (1.5MBit/s) however it appears that the retail XDK host stack does support Low Speed devices. |
+ | |||
+ | Xbox hardware has the following specific OHCI register values set by the system firmware that may differ from the standard (Obtained from a Retail v1.6 PAL Xbox): | ||
− | |||
<pre> | <pre> | ||
USB0: | USB0: | ||
− | HcRevision: | + | HcRevision: 0x10 |
− | + | HcRhDescriptorA: 0x01001204 | |
− | HcRhDescriptorA: | + | NumberDownstreamPorts: 4 (Four downstream ports) |
− | NumberDownstreamPorts: | + | PowerSwitchingMode: 0 (All ports are powered at the same time) |
− | + | NoPowerSwitching: 1 (Ports are always powered on when the HC is powered on) | |
− | + | DeviceType: 0 (Not a compound device - always 0 for Roothubs) | |
− | DeviceType: | + | OverCurrentProtectionMode: 0 (Over-current status is reported collectively for all downstream ports) |
− | OverCurrentProtectionMode: | + | NoOverCurrentProtection: 1 (No overcurrent protection supported) |
− | NoOverCurrentProtection: | + | PowerOnToPowerGoodTime: 1 (2ms Power on to good time) |
− | PowerOnToPowerGoodTime: | ||
HcRhDescriptorB: | HcRhDescriptorB: | ||
− | DeviceRemovable: | + | DeviceRemovable: 0 (Device not removable) |
− | PortPowerControlMask: | + | PortPowerControlMask: 0 (Power Control Mask not set) |
</pre> | </pre> | ||
<pre> | <pre> | ||
USB1: | USB1: | ||
− | HcRevision: | + | HcRevision: 0x10 |
− | + | HcRhDescriptorA: 0x01000202 | |
− | HcRhDescriptorA: | + | NumberDownstreamPorts: 2 (Two downstream ports) |
− | NumberDownstreamPorts: | + | PowerSwitchingMode: 0 (All ports are powered at the same time) |
− | + | NoPowerSwitching: 1 (Ports are always powered on when the HC is powered on) | |
− | + | DeviceType: 0 (Not a compound device - always 0 for Roothubs) | |
− | DeviceType: | + | OverCurrentProtectionMode: 0 (Over-current status is reported collectively for all downstream ports) |
− | OverCurrentProtectionMode: | + | NoOverCurrentProtection: 0 (Over-current status is reported collectively for all downstream ports) |
− | NoOverCurrentProtection: | + | PowerOnToPowerGoodTime: 1 (2ms Power on to good time) |
− | PowerOnToPowerGoodTime: | ||
HcRhDescriptorB: | HcRhDescriptorB: | ||
− | DeviceRemovable: | + | DeviceRemovable: 0 (Device not removable) |
− | PortPowerControlMask: | + | PortPowerControlMask: 0 (Power Control Mask not set) |
</pre> | </pre> | ||
− | == | + | == V1.0 Xboxes == |
− | + | V1.0 Xbox consoles differ in that they contain an internal 4 Port USB Daughterboard (https://xboxdevwiki.net/Motherboard#USB_Daughterboard). The daughterboard is connected to Port 1 of the OHCI Root Hub. The 4 downstream ports of the daughterboard are then fed to the 4 front panel game controller ports. In this instance Ports 2,3 and 4 on the OHCI Root Hub are not connected. | |
− | + | Xbox software uses a kernel export to determine which ports to use when looking for gamecontrollers. Bit 0 of export variable XboxHardwareInfo determines whether the daughterboard is present. If set, the daughterboard is present. | |
− | |||
− | + | == Port Numbering == | |
− | + | The front gamecontroller ports are not connected sequentially to the OHCI Root Hub ports or the Daughterboard. The following port mapping applies to all Xbox revisions: | |
− | + | <pre> | |
− | + | Game controller Port 1,2,3,4 are connected to USB hardware port 3,4,1,2 respectively. | |
− | + | </pre> | |
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Latest revision as of 21:14, 11 November 2022
USB Host Controllers
Xbox hardware contains two OHCI USB Host controllers within the MCPX southbridge. The two controllers are designated USB0 and USB1. On retail consoles USB0 is connected to the 4 front panel game controller ports. Although USB1 is available, it is not enabled in retail titles and it is not mapped out of the MCPX, so it is difficult to use in homebrew.
The USB controllers are configured and accessed over MMIO. See https://xboxdevwiki.net/Memory. The memory structure follows the standard OHCI specification (OHCI Spec Table 7-1).
- USB0 is on PCI Bus 0, device 2, function 0 and is connected to IRQ1.
- USB1 is on PCI Bus 0, device 3, function 0 and is connected to IRQ9.
OHCI supports USB devices up to USB1.1 12Mbit/s. OHCI also supports Low Speed USB (1.5MBit/s) however it appears that the retail XDK host stack does support Low Speed devices.
Xbox hardware has the following specific OHCI register values set by the system firmware that may differ from the standard (Obtained from a Retail v1.6 PAL Xbox):
USB0: HcRevision: 0x10 HcRhDescriptorA: 0x01001204 NumberDownstreamPorts: 4 (Four downstream ports) PowerSwitchingMode: 0 (All ports are powered at the same time) NoPowerSwitching: 1 (Ports are always powered on when the HC is powered on) DeviceType: 0 (Not a compound device - always 0 for Roothubs) OverCurrentProtectionMode: 0 (Over-current status is reported collectively for all downstream ports) NoOverCurrentProtection: 1 (No overcurrent protection supported) PowerOnToPowerGoodTime: 1 (2ms Power on to good time) HcRhDescriptorB: DeviceRemovable: 0 (Device not removable) PortPowerControlMask: 0 (Power Control Mask not set)
USB1: HcRevision: 0x10 HcRhDescriptorA: 0x01000202 NumberDownstreamPorts: 2 (Two downstream ports) PowerSwitchingMode: 0 (All ports are powered at the same time) NoPowerSwitching: 1 (Ports are always powered on when the HC is powered on) DeviceType: 0 (Not a compound device - always 0 for Roothubs) OverCurrentProtectionMode: 0 (Over-current status is reported collectively for all downstream ports) NoOverCurrentProtection: 0 (Over-current status is reported collectively for all downstream ports) PowerOnToPowerGoodTime: 1 (2ms Power on to good time) HcRhDescriptorB: DeviceRemovable: 0 (Device not removable) PortPowerControlMask: 0 (Power Control Mask not set)
V1.0 Xboxes
V1.0 Xbox consoles differ in that they contain an internal 4 Port USB Daughterboard (https://xboxdevwiki.net/Motherboard#USB_Daughterboard). The daughterboard is connected to Port 1 of the OHCI Root Hub. The 4 downstream ports of the daughterboard are then fed to the 4 front panel game controller ports. In this instance Ports 2,3 and 4 on the OHCI Root Hub are not connected.
Xbox software uses a kernel export to determine which ports to use when looking for gamecontrollers. Bit 0 of export variable XboxHardwareInfo determines whether the daughterboard is present. If set, the daughterboard is present.
Port Numbering
The front gamecontroller ports are not connected sequentially to the OHCI Root Hub ports or the Daughterboard. The following port mapping applies to all Xbox revisions:
Game controller Port 1,2,3,4 are connected to USB hardware port 3,4,1,2 respectively.