xboxdevwiki - User contributions [en]

Memory

2021-05-26T16:50:18Z

X86corez: /* I/O port map */ Add LPC PM address space.

The Xbox has 64MB Memory. This could be expanded to 128MB of memory on boards of revision 1.0-1.4 (Boards of revision 1.0-1.4 have empty spots for the extra memory, but they were later removed on 1.6 boards) but no games took advantage of it. The debug Xbox and the Chihiro both contained 128MB Memory.

The memory was shared between the CPU and GPU. On the retail Xbox, the [[Flash ROM]] and [[MCPX ROM]] are also mapped to memory at the top 16 MiB and the top 512 Bytes respectively. However on Debug Xboxes and Chihiro, only the Flash is mapped as they don't contain an MCPX ROM.

= Memory map =
{| class="wikitable" style="text-align: center;"
! Memory Type
! Retail Xbox Range
! Debug/Chihiro Range
|-
|Main Memory
|0x00000000 - 0x03FFFFFF
|0x00000000 - 0x07FFFFFF
|-
|[[GPU|GPU (NV2A) Registers]]
|colspan="2"|0xFD000000 - 0xFDFFFFFF
|-
|[[APU|APU Registers]]
|colspan="2"|0xFE800000 - 0xFE87FFFF
|-
|[[ACI|ACI (AC97) Registers]]
|colspan="2"|0xFEC00000 - 0xFEC00FFF
|-
|USB 0 Registers
|colspan="2"|0xFED00000 - 0xFED00FFF
|-
|USB 1 Registers
|colspan="2"|0xFED08000 - 0xFED08FFF
|-
|NIC (NVNet) Registers
|colspan="2"|0xFEF00000 - 0xFEF003FF
|-
|[[Flash ROM]]
|colspan="2"|0xFF000000 - 0xFFFFFFFF
|-
|[[MCPX ROM]]
|0xFFFFFE00 - 0xFFFFFFFF
|N/A
|}

= I/O port map =
{{FIXME|reason=Taken from the KVMBOX memorymap.txt, not confirmed}}

{| class="wikitable" style="text-align: center;"
! Device
! Retail Xbox Range
! Debug/Chihiro Range
|-
|DMA Channels 0-3
|colspan="2"|0x0000 - 0x000F
|-
|Master PIC
|colspan="2"|0x0020 - 0x0021
|-
|[[Super I/O|Super I/O Configuration]]
|N/A
|0x002E - 0x002F
|-
|[[Porting an Operating System to the Xbox HOWTO #Timer Frequency|PIT]]
|colspan="2"|0x0040 - 0x0043
|-
|[[17 Mistakes Microsoft Made in the Xbox Security System #The Xbox Hardware|A20 Gate]] / [[MCPX #Pin L21: PC Speaker|Speaker]]
|colspan="2"|0x0060 - 0x006F
|-
|CMOS / RTC
|colspan="2"|0x0070 - 0x0073
|-
|DMA Page Address
|colspan="2"|0x0080 - 0x008F
|-
|Slave PIC
|colspan="2"|0x00A0 - 0x00A1
|-
|DMA Channels 4-7
|colspan="2"|0x00C0 - 0x00DF
|-
|FPU Error Control
|colspan="2"|0x00F0 - 0x00F1
|-
|IDE
|colspan="2"|0x01F0 - 0x01F7
|-
|vesafb {{FIXME|reason=Does XGPU expose I/O ports?}}
|colspan="2"|0x03C0 - 0x03DF
|-
|IDE {{FIXME|reason=Really? This is rather one of FDC ports}}
|colspan="2"|0x03F6 - 0x03F6
|-
|[[Super I/O|Super I/O Serial]]
|N/A
|0x03F8 - 0x03FF
|-
|[[PCI|PCI Configuration]]
|colspan="2"|0x0CF8 - 0x0CFF
|-
|[[SMBus|SMBus (I2C)]]
|colspan="2"|0x1000 - 0x100F
|-
|rowspan="2"|Modem (MC97)
|colspan="2"|0x1080 - 0x10FF
|-
|colspan="2"|0x1400 - 0x14FF
|-
|[[PCI #00.01:0 - ISA Bridge|LPC PM]]
|colspan="2"|0x8000 - 0x80FF
|-
|rowspan="2"|[[SMBus|SMBus (I2C)]]
|colspan="2"|0xC000 - 0xC00F
|-
|colspan="2"|0xC200 - 0xC21F
|-
|rowspan="2"|[[ACI|ACI (AC97)]]
|colspan="2"|0xD000 - 0xD0FF
|-
|colspan="2"|0xD200 - 0xD27F
|-
|NIC (NVNet)
|colspan="2"|0xE000 - 0xE007
|-
|IDE
|colspan="2"|0xFF60 - 0xFF6F
|}

= Emulation =
Code for emulating the memory might consist of:

<pre>
#ifdef DEBUG || CHIHIRO
#define MEMORY_SIZE 128 * 1024 * 1024
int mcpx_active = 0;
#else
#define MEMORY_SIZE 64 * 1024 * 1024
int mcpx_active = 1;
#endif

#define FLASH_SIZE 256 * 1024
#define FLASH_MAP_SIZE 16 * 1024 * 1024
#define FLASH_MAP_ADDRESS (0xFFFFFFFF - FLASH_MAP_SIZE + 1)

#define MCPX_SIZE 0x200
#define MCPX_MAP_ADDRESS (0xFFFFFFFF - MCPX_MAP_SIZE + 1)

uint8_t memory[MEMORY_SIZE] = {0};
uint8_t flash[FLASH_SIZE] = {0};
uint8_t mcpx[MCPX_SIZE] = {0};

uint8_t get_memory_byte(uint32_t location) {
if (location < MEMORY_SIZE) {
return memory[location];
}

if (mcpx_active && location >= MCPX_MAP_ADDRESS) {
return mcpx[location - MCPX_MAP_ADDRESS];
}

if (location >= FLASH_MAP_ADDRESS) {
return flash[(location - FLASH_MAP_ADDRESS) % FLASH_SIZE];
}

printf("Memory in unspecified range: %08X\n", location);
return 0;
}

uint16_t get_memory_word(uint32_t location) {
return get_memory_byte(location + 1) << 8 | get_memory_byte(location);
}

uint32_t get_memory_dword(uint32_t location) {
return get_memory_word(location + 2) << 16 | get_memory_word(location);
}

void deactivate_mcpx() {
mcpx_active = 0;
}
</pre>

Memory

2021-05-26T16:40:52Z

X86corez: /* I/O port map */ Fixes from AMD-768 Peripheral Bus Controller datasheet.

The Xbox has 64MB Memory. This could be expanded to 128MB of memory on boards of revision 1.0-1.4 (Boards of revision 1.0-1.4 have empty spots for the extra memory, but they were later removed on 1.6 boards) but no games took advantage of it. The debug Xbox and the Chihiro both contained 128MB Memory.

The memory was shared between the CPU and GPU. On the retail Xbox, the [[Flash ROM]] and [[MCPX ROM]] are also mapped to memory at the top 16 MiB and the top 512 Bytes respectively. However on Debug Xboxes and Chihiro, only the Flash is mapped as they don't contain an MCPX ROM.

= Memory map =
{| class="wikitable" style="text-align: center;"
! Memory Type
! Retail Xbox Range
! Debug/Chihiro Range
|-
|Main Memory
|0x00000000 - 0x03FFFFFF
|0x00000000 - 0x07FFFFFF
|-
|[[GPU|GPU (NV2A) Registers]]
|colspan="2"|0xFD000000 - 0xFDFFFFFF
|-
|[[APU|APU Registers]]
|colspan="2"|0xFE800000 - 0xFE87FFFF
|-
|[[ACI|ACI (AC97) Registers]]
|colspan="2"|0xFEC00000 - 0xFEC00FFF
|-
|USB 0 Registers
|colspan="2"|0xFED00000 - 0xFED00FFF
|-
|USB 1 Registers
|colspan="2"|0xFED08000 - 0xFED08FFF
|-
|NIC (NVNet) Registers
|colspan="2"|0xFEF00000 - 0xFEF003FF
|-
|[[Flash ROM]]
|colspan="2"|0xFF000000 - 0xFFFFFFFF
|-
|[[MCPX ROM]]
|0xFFFFFE00 - 0xFFFFFFFF
|N/A
|}

= I/O port map =
{{FIXME|reason=Taken from the KVMBOX memorymap.txt, not confirmed}}

{| class="wikitable" style="text-align: center;"
! Device
! Retail Xbox Range
! Debug/Chihiro Range
|-
|DMA Channels 0-3
|colspan="2"|0x0000 - 0x000F
|-
|Master PIC
|colspan="2"|0x0020 - 0x0021
|-
|[[Super I/O|Super I/O Configuration]]
|N/A
|0x002E - 0x002F
|-
|[[Porting an Operating System to the Xbox HOWTO #Timer Frequency|PIT]]
|colspan="2"|0x0040 - 0x0043
|-
|[[17 Mistakes Microsoft Made in the Xbox Security System #The Xbox Hardware|A20 Gate]] / [[MCPX #Pin L21: PC Speaker|Speaker]]
|colspan="2"|0x0060 - 0x006F
|-
|CMOS / RTC
|colspan="2"|0x0070 - 0x0073
|-
|DMA Page Address
|colspan="2"|0x0080 - 0x008F
|-
|Slave PIC
|colspan="2"|0x00A0 - 0x00A1
|-
|DMA Channels 4-7
|colspan="2"|0x00C0 - 0x00DF
|-
|FPU Error Control
|colspan="2"|0x00F0 - 0x00F1
|-
|IDE
|colspan="2"|0x01F0 - 0x01F7
|-
|vesafb {{FIXME|reason=Does XGPU expose I/O ports?}}
|colspan="2"|0x03C0 - 0x03DF
|-
|IDE {{FIXME|reason=Really? This is rather one of FDC ports}}
|colspan="2"|0x03F6 - 0x03F6
|-
|[[Super I/O|Super I/O Serial]]
|N/A
|0x03F8 - 0x03FF
|-
|[[PCI|PCI Configuration]]
|colspan="2"|0x0CF8 - 0x0CFF
|-
|[[SMBus|SMBus (I2C)]]
|colspan="2"|0x1000 - 0x100F
|-
|rowspan="2"|Modem (MC97)
|colspan="2"|0x1080 - 0x10FF
|-
|colspan="2"|0x1400 - 0x14FF
|-
|rowspan="2"|[[SMBus|SMBus (I2C)]]
|colspan="2"|0xC000 - 0xC00F
|-
|colspan="2"|0xC200 - 0xC21F
|-
|rowspan="2"|[[ACI|ACI (AC97)]]
|colspan="2"|0xD000 - 0xD0FF
|-
|colspan="2"|0xD200 - 0xD27F
|-
|NIC (NVNet)
|colspan="2"|0xE000 - 0xE007
|-
|IDE
|colspan="2"|0xFF60 - 0xFF6F
|}

= Emulation =
Code for emulating the memory might consist of:

<pre>
#ifdef DEBUG || CHIHIRO
#define MEMORY_SIZE 128 * 1024 * 1024
int mcpx_active = 0;
#else
#define MEMORY_SIZE 64 * 1024 * 1024
int mcpx_active = 1;
#endif

#define FLASH_SIZE 256 * 1024
#define FLASH_MAP_SIZE 16 * 1024 * 1024
#define FLASH_MAP_ADDRESS (0xFFFFFFFF - FLASH_MAP_SIZE + 1)

#define MCPX_SIZE 0x200
#define MCPX_MAP_ADDRESS (0xFFFFFFFF - MCPX_MAP_SIZE + 1)

uint8_t memory[MEMORY_SIZE] = {0};
uint8_t flash[FLASH_SIZE] = {0};
uint8_t mcpx[MCPX_SIZE] = {0};

uint8_t get_memory_byte(uint32_t location) {
if (location < MEMORY_SIZE) {
return memory[location];
}

if (mcpx_active && location >= MCPX_MAP_ADDRESS) {
return mcpx[location - MCPX_MAP_ADDRESS];
}

if (location >= FLASH_MAP_ADDRESS) {
return flash[(location - FLASH_MAP_ADDRESS) % FLASH_SIZE];
}

printf("Memory in unspecified range: %08X\n", location);
return 0;
}

uint16_t get_memory_word(uint32_t location) {
return get_memory_byte(location + 1) << 8 | get_memory_byte(location);
}

uint32_t get_memory_dword(uint32_t location) {
return get_memory_word(location + 2) << 16 | get_memory_word(location);
}

void deactivate_mcpx() {
mcpx_active = 0;
}
</pre>

Memory

2021-05-25T15:52:53Z

X86corez: /* I/O port map */ Better descriptions.

The Xbox has 64MB Memory. This could be expanded to 128MB of memory on boards of revision 1.0-1.4 (Boards of revision 1.0-1.4 have empty spots for the extra memory, but they were later removed on 1.6 boards) but no games took advantage of it. The debug Xbox and the Chihiro both contained 128MB Memory.

The memory was shared between the CPU and GPU. On the retail Xbox, the [[Flash ROM]] and [[MCPX ROM]] are also mapped to memory at the top 16 MiB and the top 512 Bytes respectively. However on Debug Xboxes and Chihiro, only the Flash is mapped as they don't contain an MCPX ROM.

= Memory map =
{| class="wikitable" style="text-align: center;"
! Memory Type
! Retail Xbox Range
! Debug/Chihiro Range
|-
|Main Memory
|0x00000000 - 0x03FFFFFF
|0x00000000 - 0x07FFFFFF
|-
|[[GPU|GPU (NV2A) Registers]]
|colspan="2"|0xFD000000 - 0xFDFFFFFF
|-
|[[APU|APU Registers]]
|colspan="2"|0xFE800000 - 0xFE87FFFF
|-
|[[ACI|ACI (AC97) Registers]]
|colspan="2"|0xFEC00000 - 0xFEC00FFF
|-
|USB 0 Registers
|colspan="2"|0xFED00000 - 0xFED00FFF
|-
|USB 1 Registers
|colspan="2"|0xFED08000 - 0xFED08FFF
|-
|NIC (NVNet) Registers
|colspan="2"|0xFEF00000 - 0xFEF003FF
|-
|[[Flash ROM]]
|colspan="2"|0xFF000000 - 0xFFFFFFFF
|-
|[[MCPX ROM]]
|0xFFFFFE00 - 0xFFFFFFFF
|N/A
|}

= I/O port map =
{{FIXME|reason=Taken from the KVMBOX memorymap.txt, not confirmed}}

{| class="wikitable" style="text-align: center;"
! Device
! Retail Xbox Range
! Debug/Chihiro Range
|-
|DMA Channels 0-3
|colspan="2"|0x0000 - 0x001F
|-
|Master PIC
|colspan="2"|0x0020 - 0x0021
|-
|[[Super I/O|Super I/O Configuration]]
|N/A
|0x002E - 0x002F
|-
|[[Porting an Operating System to the Xbox HOWTO #Timer Frequency|PIT]]
|colspan="2"|0x0040 - 0x0043
|-
|Timer 1 {{FIXME|reason=What is this?}}
|colspan="2"|0x0050 - 0x0053
|-
|[[17 Mistakes Microsoft Made in the Xbox Security System #The Xbox Hardware|A20 Gate]] / [[MCPX #Pin L21: PC Speaker|Speaker]]
|colspan="2"|0x0060 - 0x006F
|-
|CMOS / RTC
|colspan="2"|0x0070 - 0x007F
|-
|DMA Page Address
|colspan="2"|0x0080 - 0x008F
|-
|Slave PIC
|colspan="2"|0x00A0 - 0x00A1
|-
|DMA Channels 4-7
|colspan="2"|0x00C0 - 0x00DF
|-
|FPU {{FIXME|reason=What is this?}}
|colspan="2"|0x00F0 - 0x00FF
|-
|IDE
|colspan="2"|0x01F0 - 0x01F7
|-
|vesafb {{FIXME|reason=Does XGPU expose I/O ports?}}
|colspan="2"|0x03C0 - 0x03DF
|-
|IDE {{FIXME|reason=Really? This is rather one of FDC ports}}
|colspan="2"|0x03F6 - 0x03F6
|-
|[[Super I/O|Super I/O Serial]]
|N/A
|0x03F8 - 0x03FF
|-
|[[PCI|PCI Configuration]]
|colspan="2"|0x0CF8 - 0x0CFF
|-
|[[SMBus|SMBus (I2C)]]
|colspan="2"|0x1000 - 0x100F
|-
|rowspan="2"|Modem (MC97)
|colspan="2"|0x1080 - 0x10FF
|-
|colspan="2"|0x1400 - 0x14FF
|-
|rowspan="2"|[[SMBus|SMBus (I2C)]]
|colspan="2"|0xC000 - 0xC00F
|-
|colspan="2"|0xC200 - 0xC21F
|-
|rowspan="2"|[[ACI|ACI (AC97)]]
|colspan="2"|0xD000 - 0xD0FF
|-
|colspan="2"|0xD200 - 0xD27F
|-
|NIC (NVNet)
|colspan="2"|0xE000 - 0xE007
|-
|IDE
|colspan="2"|0xFF60 - 0xFF6F
|}

= Emulation =
Code for emulating the memory might consist of:

<pre>
#ifdef DEBUG || CHIHIRO
#define MEMORY_SIZE 128 * 1024 * 1024
int mcpx_active = 0;
#else
#define MEMORY_SIZE 64 * 1024 * 1024
int mcpx_active = 1;
#endif

#define FLASH_SIZE 256 * 1024
#define FLASH_MAP_SIZE 16 * 1024 * 1024
#define FLASH_MAP_ADDRESS (0xFFFFFFFF - FLASH_MAP_SIZE + 1)

#define MCPX_SIZE 0x200
#define MCPX_MAP_ADDRESS (0xFFFFFFFF - MCPX_MAP_SIZE + 1)

uint8_t memory[MEMORY_SIZE] = {0};
uint8_t flash[FLASH_SIZE] = {0};
uint8_t mcpx[MCPX_SIZE] = {0};

uint8_t get_memory_byte(uint32_t location) {
if (location < MEMORY_SIZE) {
return memory[location];
}

if (mcpx_active && location >= MCPX_MAP_ADDRESS) {
return mcpx[location - MCPX_MAP_ADDRESS];
}

if (location >= FLASH_MAP_ADDRESS) {
return flash[(location - FLASH_MAP_ADDRESS) % FLASH_SIZE];
}

printf("Memory in unspecified range: %08X\n", location);
return 0;
}

uint16_t get_memory_word(uint32_t location) {
return get_memory_byte(location + 1) << 8 | get_memory_byte(location);
}

uint32_t get_memory_dword(uint32_t location) {
return get_memory_word(location + 2) << 16 | get_memory_word(location);
}

void deactivate_mcpx() {
mcpx_active = 0;
}
</pre>

Memory

2021-05-25T15:16:34Z

X86corez: /* I/O port map */ Add Super I/O and Serial ports.

The Xbox has 64MB Memory. This could be expanded to 128MB of memory on boards of revision 1.0-1.4 (Boards of revision 1.0-1.4 have empty spots for the extra memory, but they were later removed on 1.6 boards) but no games took advantage of it. The debug Xbox and the Chihiro both contained 128MB Memory.

The memory was shared between the CPU and GPU. On the retail Xbox, the [[Flash ROM]] and [[MCPX ROM]] are also mapped to memory at the top 16 MiB and the top 512 Bytes respectively. However on Debug Xboxes and Chihiro, only the Flash is mapped as they don't contain an MCPX ROM.

= Memory map =
{| class="wikitable" style="text-align: center;"
! Memory Type
! Retail Xbox Range
! Debug/Chihiro Range
|-
|Main Memory
|0x00000000 - 0x03FFFFFF
|0x00000000 - 0x07FFFFFF
|-
|[[GPU|GPU (NV2A) Registers]]
|colspan="2"|0xFD000000 - 0xFDFFFFFF
|-
|[[APU|APU Registers]]
|colspan="2"|0xFE800000 - 0xFE87FFFF
|-
|[[ACI|ACI (AC97) Registers]]
|colspan="2"|0xFEC00000 - 0xFEC00FFF
|-
|USB 0 Registers
|colspan="2"|0xFED00000 - 0xFED00FFF
|-
|USB 1 Registers
|colspan="2"|0xFED08000 - 0xFED08FFF
|-
|NIC (NVNet) Registers
|colspan="2"|0xFEF00000 - 0xFEF003FF
|-
|[[Flash ROM]]
|colspan="2"|0xFF000000 - 0xFFFFFFFF
|-
|[[MCPX ROM]]
|0xFFFFFE00 - 0xFFFFFFFF
|N/A
|}

= I/O port map =
{{FIXME|reason=Taken from the KVMBOX memorymap.txt, not confirmed}}

{| class="wikitable" style="text-align: center;"
! Device
! Retail Xbox Range
! Debug/Chihiro Range
|-
|DMA Channels 0-3
|colspan="2"|0x0000 - 0x001F
|-
|Master PIC
|colspan="2"|0x0020 - 0x0021
|-
|[[Super I/O]]
|N/A
|0x002E - 0x002F
|-
|[[Porting an Operating System to the Xbox HOWTO #Timer Frequency|PIT]]
|colspan="2"|0x0040 - 0x0043
|-
|Timer 1 {{FIXME|reason=What is this?}}
|colspan="2"|0x0050 - 0x0053
|-
|[[17 Mistakes Microsoft Made in the Xbox Security System #The Xbox Hardware|A20 Gate]] / [[MCPX #Pin L21: PC Speaker|Speaker]]
|colspan="2"|0x0060 - 0x006F
|-
|CMOS / RTC
|colspan="2"|0x0070 - 0x007F
|-
|DMA Page Address
|colspan="2"|0x0080 - 0x008F
|-
|Slave PIC
|colspan="2"|0x00A0 - 0x00A1
|-
|DMA Channels 4-7
|colspan="2"|0x00C0 - 0x00DF
|-
|FPU {{FIXME|reason=What is this?}}
|colspan="2"|0x00F0 - 0x00FF
|-
|IDE
|colspan="2"|0x01F0 - 0x01F7
|-
|vesafb {{FIXME|reason=Does XGPU expose I/O ports?}}
|colspan="2"|0x03C0 - 0x03DF
|-
|IDE {{FIXME|reason=Really? This is rather one of FDC ports}}
|colspan="2"|0x03F6 - 0x03F6
|-
|Serial (COM1)
|N/A
|0x03F8 - 0x03FF
|-
|[[PCI|PCI Configuration Space]]
|colspan="2"|0x0CF8 - 0x0CFF
|-
|[[SMBus|SMBus (I2C)]]
|colspan="2"|0x1000 - 0x100F
|-
|rowspan="2"|Modem (MC97)
|colspan="2"|0x1080 - 0x10FF
|-
|colspan="2"|0x1400 - 0x14FF
|-
|rowspan="2"|[[SMBus|SMBus (I2C)]]
|colspan="2"|0xC000 - 0xC00F
|-
|colspan="2"|0xC200 - 0xC21F
|-
|rowspan="2"|[[ACI|ACI (AC97)]]
|colspan="2"|0xD000 - 0xD0FF
|-
|colspan="2"|0xD200 - 0xD27F
|-
|NIC (NVNet)
|colspan="2"|0xE000 - 0xE007
|-
|IDE
|colspan="2"|0xFF60 - 0xFF6F
|}

= Emulation =
Code for emulating the memory might consist of:

<pre>
#ifdef DEBUG || CHIHIRO
#define MEMORY_SIZE 128 * 1024 * 1024
int mcpx_active = 0;
#else
#define MEMORY_SIZE 64 * 1024 * 1024
int mcpx_active = 1;
#endif

#define FLASH_SIZE 256 * 1024
#define FLASH_MAP_SIZE 16 * 1024 * 1024
#define FLASH_MAP_ADDRESS (0xFFFFFFFF - FLASH_MAP_SIZE + 1)

#define MCPX_SIZE 0x200
#define MCPX_MAP_ADDRESS (0xFFFFFFFF - MCPX_MAP_SIZE + 1)

uint8_t memory[MEMORY_SIZE] = {0};
uint8_t flash[FLASH_SIZE] = {0};
uint8_t mcpx[MCPX_SIZE] = {0};

uint8_t get_memory_byte(uint32_t location) {
if (location < MEMORY_SIZE) {
return memory[location];
}

if (mcpx_active && location >= MCPX_MAP_ADDRESS) {
return mcpx[location - MCPX_MAP_ADDRESS];
}

if (location >= FLASH_MAP_ADDRESS) {
return flash[(location - FLASH_MAP_ADDRESS) % FLASH_SIZE];
}

printf("Memory in unspecified range: %08X\n", location);
return 0;
}

uint16_t get_memory_word(uint32_t location) {
return get_memory_byte(location + 1) << 8 | get_memory_byte(location);
}

uint32_t get_memory_dword(uint32_t location) {
return get_memory_word(location + 2) << 16 | get_memory_word(location);
}

void deactivate_mcpx() {
mcpx_active = 0;
}
</pre>

Memory

2021-05-25T15:11:34Z

X86corez: /* I/O port map */ Fix PIC ports.

The Xbox has 64MB Memory. This could be expanded to 128MB of memory on boards of revision 1.0-1.4 (Boards of revision 1.0-1.4 have empty spots for the extra memory, but they were later removed on 1.6 boards) but no games took advantage of it. The debug Xbox and the Chihiro both contained 128MB Memory.

The memory was shared between the CPU and GPU. On the retail Xbox, the [[Flash ROM]] and [[MCPX ROM]] are also mapped to memory at the top 16 MiB and the top 512 Bytes respectively. However on Debug Xboxes and Chihiro, only the Flash is mapped as they don't contain an MCPX ROM.

= Memory map =
{| class="wikitable" style="text-align: center;"
! Memory Type
! Retail Xbox Range
! Debug/Chihiro Range
|-
|Main Memory
|0x00000000 - 0x03FFFFFF
|0x00000000 - 0x07FFFFFF
|-
|[[GPU|GPU (NV2A) Registers]]
|colspan="2"|0xFD000000 - 0xFDFFFFFF
|-
|[[APU|APU Registers]]
|colspan="2"|0xFE800000 - 0xFE87FFFF
|-
|[[ACI|ACI (AC97) Registers]]
|colspan="2"|0xFEC00000 - 0xFEC00FFF
|-
|USB 0 Registers
|colspan="2"|0xFED00000 - 0xFED00FFF
|-
|USB 1 Registers
|colspan="2"|0xFED08000 - 0xFED08FFF
|-
|NIC (NVNet) Registers
|colspan="2"|0xFEF00000 - 0xFEF003FF
|-
|[[Flash ROM]]
|colspan="2"|0xFF000000 - 0xFFFFFFFF
|-
|[[MCPX ROM]]
|0xFFFFFE00 - 0xFFFFFFFF
|N/A
|}

= I/O port map =
{{FIXME|reason=Taken from the KVMBOX memorymap.txt, not confirmed}}

{| class="wikitable" style="text-align: center;"
! Device
! Retail Xbox Range
! Debug/Chihiro Range
|-
|DMA Channels 0-3
|colspan="2"|0x0000 - 0x001F
|-
|Master PIC
|colspan="2"|0x0020 - 0x0021
|-
|[[Porting an Operating System to the Xbox HOWTO #Timer Frequency|PIT]]
|colspan="2"|0x0040 - 0x0043
|-
|Timer 1 {{FIXME|reason=What is this?}}
|colspan="2"|0x0050 - 0x0053
|-
|[[17 Mistakes Microsoft Made in the Xbox Security System #The Xbox Hardware|A20 Gate]] / [[MCPX #Pin L21: PC Speaker|Speaker]]
|colspan="2"|0x0060 - 0x006F
|-
|CMOS / RTC
|colspan="2"|0x0070 - 0x007F
|-
|DMA Page Address
|colspan="2"|0x0080 - 0x008F
|-
|Slave PIC
|colspan="2"|0x00A0 - 0x00A1
|-
|DMA Channels 4-7
|colspan="2"|0x00C0 - 0x00DF
|-
|FPU {{FIXME|reason=What is this?}}
|colspan="2"|0x00F0 - 0x00FF
|-
|IDE
|colspan="2"|0x01F0 - 0x01F7
|-
|vesafb {{FIXME|reason=Does XGPU expose I/O ports?}}
|colspan="2"|0x03C0 - 0x03DF
|-
|IDE {{FIXME|reason=Really? This is rather one of FDC ports}}
|colspan="2"|0x03F6 - 0x03F6
|-
|[[PCI|PCI Configuration Space]]
|colspan="2"|0x0CF8 - 0x0CFF
|-
|[[SMBus|SMBus (I2C)]]
|colspan="2"|0x1000 - 0x100F
|-
|rowspan="2"|Modem (MC97)
|colspan="2"|0x1080 - 0x10FF
|-
|colspan="2"|0x1400 - 0x14FF
|-
|rowspan="2"|[[SMBus|SMBus (I2C)]]
|colspan="2"|0xC000 - 0xC00F
|-
|colspan="2"|0xC200 - 0xC21F
|-
|rowspan="2"|[[ACI|ACI (AC97)]]
|colspan="2"|0xD000 - 0xD0FF
|-
|colspan="2"|0xD200 - 0xD27F
|-
|NIC (NVNet)
|colspan="2"|0xE000 - 0xE007
|-
|IDE
|colspan="2"|0xFF60 - 0xFF6F
|}

= Emulation =
Code for emulating the memory might consist of:

<pre>
#ifdef DEBUG || CHIHIRO
#define MEMORY_SIZE 128 * 1024 * 1024
int mcpx_active = 0;
#else
#define MEMORY_SIZE 64 * 1024 * 1024
int mcpx_active = 1;
#endif

#define FLASH_SIZE 256 * 1024
#define FLASH_MAP_SIZE 16 * 1024 * 1024
#define FLASH_MAP_ADDRESS (0xFFFFFFFF - FLASH_MAP_SIZE + 1)

#define MCPX_SIZE 0x200
#define MCPX_MAP_ADDRESS (0xFFFFFFFF - MCPX_MAP_SIZE + 1)

uint8_t memory[MEMORY_SIZE] = {0};
uint8_t flash[FLASH_SIZE] = {0};
uint8_t mcpx[MCPX_SIZE] = {0};

uint8_t get_memory_byte(uint32_t location) {
if (location < MEMORY_SIZE) {
return memory[location];
}

if (mcpx_active && location >= MCPX_MAP_ADDRESS) {
return mcpx[location - MCPX_MAP_ADDRESS];
}

if (location >= FLASH_MAP_ADDRESS) {
return flash[(location - FLASH_MAP_ADDRESS) % FLASH_SIZE];
}

printf("Memory in unspecified range: %08X\n", location);
return 0;
}

uint16_t get_memory_word(uint32_t location) {
return get_memory_byte(location + 1) << 8 | get_memory_byte(location);
}

uint32_t get_memory_dword(uint32_t location) {
return get_memory_word(location + 2) << 16 | get_memory_word(location);
}

void deactivate_mcpx() {
mcpx_active = 0;
}
</pre>

Memory

2021-05-25T15:06:13Z

X86corez: Add relevant links. Mark questionable I/O ports.

The Xbox has 64MB Memory. This could be expanded to 128MB of memory on boards of revision 1.0-1.4 (Boards of revision 1.0-1.4 have empty spots for the extra memory, but they were later removed on 1.6 boards) but no games took advantage of it. The debug Xbox and the Chihiro both contained 128MB Memory.

The memory was shared between the CPU and GPU. On the retail Xbox, the [[Flash ROM]] and [[MCPX ROM]] are also mapped to memory at the top 16 MiB and the top 512 Bytes respectively. However on Debug Xboxes and Chihiro, only the Flash is mapped as they don't contain an MCPX ROM.

= Memory map =
{| class="wikitable" style="text-align: center;"
! Memory Type
! Retail Xbox Range
! Debug/Chihiro Range
|-
|Main Memory
|0x00000000 - 0x03FFFFFF
|0x00000000 - 0x07FFFFFF
|-
|[[GPU|GPU (NV2A) Registers]]
|colspan="2"|0xFD000000 - 0xFDFFFFFF
|-
|[[APU|APU Registers]]
|colspan="2"|0xFE800000 - 0xFE87FFFF
|-
|[[ACI|ACI (AC97) Registers]]
|colspan="2"|0xFEC00000 - 0xFEC00FFF
|-
|USB 0 Registers
|colspan="2"|0xFED00000 - 0xFED00FFF
|-
|USB 1 Registers
|colspan="2"|0xFED08000 - 0xFED08FFF
|-
|NIC (NVNet) Registers
|colspan="2"|0xFEF00000 - 0xFEF003FF
|-
|[[Flash ROM]]
|colspan="2"|0xFF000000 - 0xFFFFFFFF
|-
|[[MCPX ROM]]
|0xFFFFFE00 - 0xFFFFFFFF
|N/A
|}

= I/O port map =
{{FIXME|reason=Taken from the KVMBOX memorymap.txt, not confirmed}}

{| class="wikitable" style="text-align: center;"
! Device
! Retail Xbox Range
! Debug/Chihiro Range
|-
|DMA Channels 0-3
|colspan="2"|0x0000 - 0x001F
|-
|Master PIC
|colspan="2"|0x0020 - 0x003F
|-
|[[Porting an Operating System to the Xbox HOWTO #Timer Frequency|PIT]]
|colspan="2"|0x0040 - 0x0043
|-
|Timer 1 {{FIXME|reason=What is this?}}
|colspan="2"|0x0050 - 0x0053
|-
|[[17 Mistakes Microsoft Made in the Xbox Security System #The Xbox Hardware|A20 Gate]] / [[MCPX #Pin L21: PC Speaker|Speaker]]
|colspan="2"|0x0060 - 0x006F
|-
|CMOS / RTC
|colspan="2"|0x0070 - 0x007F
|-
|DMA Page Address
|colspan="2"|0x0080 - 0x008F
|-
|Slave PIC
|colspan="2"|0x00A0 - 0x00BF
|-
|DMA Channels 4-7
|colspan="2"|0x00C0 - 0x00DF
|-
|FPU {{FIXME|reason=What is this?}}
|colspan="2"|0x00F0 - 0x00FF
|-
|IDE
|colspan="2"|0x01F0 - 0x01F7
|-
|vesafb {{FIXME|reason=Does XGPU expose I/O ports?}}
|colspan="2"|0x03C0 - 0x03DF
|-
|IDE {{FIXME|reason=Really? This is rather one of FDC ports}}
|colspan="2"|0x03F6 - 0x03F6
|-
|[[PCI|PCI Configuration Space]]
|colspan="2"|0x0CF8 - 0x0CFF
|-
|[[SMBus|SMBus (I2C)]]
|colspan="2"|0x1000 - 0x100F
|-
|rowspan="2"|Modem (MC97)
|colspan="2"|0x1080 - 0x10FF
|-
|colspan="2"|0x1400 - 0x14FF
|-
|rowspan="2"|[[SMBus|SMBus (I2C)]]
|colspan="2"|0xC000 - 0xC00F
|-
|colspan="2"|0xC200 - 0xC21F
|-
|rowspan="2"|[[ACI|ACI (AC97)]]
|colspan="2"|0xD000 - 0xD0FF
|-
|colspan="2"|0xD200 - 0xD27F
|-
|NIC (NVNet)
|colspan="2"|0xE000 - 0xE007
|-
|IDE
|colspan="2"|0xFF60 - 0xFF6F
|}

= Emulation =
Code for emulating the memory might consist of:

<pre>
#ifdef DEBUG || CHIHIRO
#define MEMORY_SIZE 128 * 1024 * 1024
int mcpx_active = 0;
#else
#define MEMORY_SIZE 64 * 1024 * 1024
int mcpx_active = 1;
#endif

#define FLASH_SIZE 256 * 1024
#define FLASH_MAP_SIZE 16 * 1024 * 1024
#define FLASH_MAP_ADDRESS (0xFFFFFFFF - FLASH_MAP_SIZE + 1)

#define MCPX_SIZE 0x200
#define MCPX_MAP_ADDRESS (0xFFFFFFFF - MCPX_MAP_SIZE + 1)

uint8_t memory[MEMORY_SIZE] = {0};
uint8_t flash[FLASH_SIZE] = {0};
uint8_t mcpx[MCPX_SIZE] = {0};

uint8_t get_memory_byte(uint32_t location) {
if (location < MEMORY_SIZE) {
return memory[location];
}

if (mcpx_active && location >= MCPX_MAP_ADDRESS) {
return mcpx[location - MCPX_MAP_ADDRESS];
}

if (location >= FLASH_MAP_ADDRESS) {
return flash[(location - FLASH_MAP_ADDRESS) % FLASH_SIZE];
}

printf("Memory in unspecified range: %08X\n", location);
return 0;
}

uint16_t get_memory_word(uint32_t location) {
return get_memory_byte(location + 1) << 8 | get_memory_byte(location);
}

uint32_t get_memory_dword(uint32_t location) {
return get_memory_word(location + 2) << 16 | get_memory_word(location);
}

void deactivate_mcpx() {
mcpx_active = 0;
}
</pre>

Memory

2021-05-25T14:38:20Z

X86corez: /* I/O port map */ Convert to the same table format as memory map.

The Xbox has 64MB Memory. This could be expanded to 128MB of memory on boards of revision 1.0-1.4 (Boards of revision 1.0-1.4 have empty spots for the extra memory, but they were later removed on 1.6 boards) but no games took advantage of it. The debug Xbox and the Chihiro both contained 128MB Memory.

The memory was shared between the CPU and GPU. On the retail Xbox, the [[Flash ROM]] and [[MCPX ROM]] are also mapped to memory at the top 16 MiB and the top 512 Bytes respectively. However on Debug Xboxes and Chihiro, only the Flash is mapped as they don't contain an MCPX ROM.

= Memory map =
{| class="wikitable" style="text-align: center;"
! Memory Type
! Retail Xbox Range
! Debug/Chihiro Range
|-
|Main Memory
|0x00000000 - 0x03FFFFFF
|0x00000000 - 0x07FFFFFF
|-
|[[GPU|GPU (NV2A) Registers]]
|colspan="2"|0xFD000000 - 0xFDFFFFFF
|-
|[[APU|APU Registers]]
|colspan="2"|0xFE800000 - 0xFE87FFFF
|-
|ACI (AC97) Registers
|colspan="2"|0xFEC00000 - 0xFEC00FFF
|-
|USB 0 Registers
|colspan="2"|0xFED00000 - 0xFED00FFF
|-
|USB 1 Registers
|colspan="2"|0xFED08000 - 0xFED08FFF
|-
|NIC (NVNet) Registers
|colspan="2"|0xFEF00000 - 0xFEF003FF
|-
|[[Flash ROM]]
|colspan="2"|0xFF000000 - 0xFFFFFFFF
|-
|[[MCPX ROM]]
|0xFFFFFE00 - 0xFFFFFFFF
|N/A
|}

= I/O port map =
{{FIXME|reason=Taken from the KVMBOX memorymap.txt, not confirmed}}

{| class="wikitable" style="text-align: center;"
! Device
! Retail Xbox Range
! Debug/Chihiro Range
|-
|DMA Channels 0-3
|colspan="2"|0x0000 - 0x001F
|-
|Master PIC
|colspan="2"|0x0020 - 0x003F
|-
|Timer 0
|colspan="2"|0x0040 - 0x0043
|-
|Timer 1
|colspan="2"|0x0050 - 0x0053
|-
|A20 Gate / Speaker
|colspan="2"|0x0060 - 0x006F
|-
|CMOS / RTC
|colspan="2"|0x0070 - 0x007F
|-
|DMA Page Address
|colspan="2"|0x0080 - 0x008F
|-
|Slave PIC
|colspan="2"|0x00A0 - 0x00BF
|-
|DMA Channels 4-7
|colspan="2"|0x00C0 - 0x00DF
|-
|FPU
|colspan="2"|0x00F0 - 0x00FF
|-
|IDE
|colspan="2"|0x01F0 - 0x01F7
|-
|vesafb
|colspan="2"|0x03C0 - 0x03DF
|-
|IDE
|colspan="2"|0x03F6 - 0x03F6
|-
|PCI Configuration Space
|colspan="2"|0x0CF8 - 0x0CFF
|-
|SMBus (I2C)
|colspan="2"|0x1000 - 0x100F
|-
|rowspan="2"|Modem (MC97)
|colspan="2"|0x1080 - 0x10FF
|-
|colspan="2"|0x1400 - 0x14FF
|-
|rowspan="2"|SMBus (I2C)
|colspan="2"|0xC000 - 0xC00F
|-
|colspan="2"|0xC200 - 0xC21F
|-
|rowspan="2"|ACI (AC97)
|colspan="2"|0xD000 - 0xD0FF
|-
|colspan="2"|0xD200 - 0xD27F
|-
|NIC (NVNet)
|colspan="2"|0xE000 - 0xE007
|-
|IDE
|colspan="2"|0xFF60 - 0xFF6F
|}

= Emulation =
Code for emulating the memory might consist of:

<pre>
#ifdef DEBUG || CHIHIRO
#define MEMORY_SIZE 128 * 1024 * 1024
int mcpx_active = 0;
#else
#define MEMORY_SIZE 64 * 1024 * 1024
int mcpx_active = 1;
#endif

#define FLASH_SIZE 256 * 1024
#define FLASH_MAP_SIZE 16 * 1024 * 1024
#define FLASH_MAP_ADDRESS (0xFFFFFFFF - FLASH_MAP_SIZE + 1)

#define MCPX_SIZE 0x200
#define MCPX_MAP_ADDRESS (0xFFFFFFFF - MCPX_MAP_SIZE + 1)

uint8_t memory[MEMORY_SIZE] = {0};
uint8_t flash[FLASH_SIZE] = {0};
uint8_t mcpx[MCPX_SIZE] = {0};

uint8_t get_memory_byte(uint32_t location) {
if (location < MEMORY_SIZE) {
return memory[location];
}

if (mcpx_active && location >= MCPX_MAP_ADDRESS) {
return mcpx[location - MCPX_MAP_ADDRESS];
}

if (location >= FLASH_MAP_ADDRESS) {
return flash[(location - FLASH_MAP_ADDRESS) % FLASH_SIZE];
}

printf("Memory in unspecified range: %08X\n", location);
return 0;
}

uint16_t get_memory_word(uint32_t location) {
return get_memory_byte(location + 1) << 8 | get_memory_byte(location);
}

uint32_t get_memory_dword(uint32_t location) {
return get_memory_word(location + 2) << 16 | get_memory_word(location);
}

void deactivate_mcpx() {
mcpx_active = 0;
}
</pre>

Memory

2021-05-24T23:54:12Z

X86corez: /* I/O port map */ Remove overlapping ide0, minor corrections.

The Xbox has 64MB Memory. This could be expanded to 128MB of memory on boards of revision 1.0-1.4 (Boards of revision 1.0-1.4 have empty spots for the extra memory, but they were later removed on 1.6 boards) but no games took advantage of it. The debug Xbox and the Chihiro both contained 128MB Memory.

The memory was shared between the CPU and GPU. On the retail Xbox, the [[Flash ROM]] and [[MCPX ROM]] are also mapped to memory at the top 16 MiB and the top 512 Bytes respectively. However on Debug Xboxes and Chihiro, only the Flash is mapped as they don't contain an MCPX ROM.

= Memory map =
{| class="wikitable" style="text-align: center;"
! Memory Type
! Retail Xbox Range
! Debug/Chihiro Range
|-
|Main Memory
|0x00000000 - 0x03FFFFFF
|0x00000000 - 0x07FFFFFF
|-
|[[GPU|GPU (NV2A) Registers]]
|colspan="2"|0xFD000000 - 0xFDFFFFFF
|-
|[[APU|APU Registers]]
|colspan="2"|0xFE800000 - 0xFE87FFFF
|-
|ACI (AC97) Registers
|colspan="2"|0xFEC00000 - 0xFEC00FFF
|-
|USB 0 Registers
|colspan="2"|0xFED00000 - 0xFED00FFF
|-
|USB 1 Registers
|colspan="2"|0xFED08000 - 0xFED08FFF
|-
|NIC (NVNet) Registers
|colspan="2"|0xFEF00000 - 0xFEF003FF
|-
|[[Flash ROM]]
|colspan="2"|0xFF000000 - 0xFFFFFFFF
|-
|[[MCPX ROM]]
|0xFFFFFE00 - 0xFFFFFFFF
|N/A
|}

= I/O port map =
{{FIXME|reason=Taken from the KVMBOX memorymap.txt, not confirmed}}

{| class="wikitable"
! Ports || Purpose
|-
| 0000-001f || dma1
|-
| 0020-003f || pic1
|-
| 0040-0043 || timer0
|-
| 0050-0053 || timer1
|-
| 0060-006f || keyboard
|-
| 0070-007f || rtc
|-
| 0080-008f || dma page reg
|-
| 00a0-00bf || pic2
|-
| 00c0-00df || dma2
|-
| 00f0-00ff || fpu
|-
| 01f0-01f7 || ide0
|-
| 03c0-03df || vesafb
|-
| 03f6-03f6 || ide0
|-
| 0cf8-0cff || PCI conf1
|-
| 1000-100f || nVidia Corporation nForce PCI System Management
|-
| 1080-10ff || nVidia Corporation nForce MC'97 Modem (Intel 537)
|-
| 1400-14ff || nVidia Corporation nForce MC'97 Modem (Intel 537)
|-
| c000-c00f || nVidia Corporation nForce PCI System Management (amd756-smbus)
|-
| c200-c21f || nVidia Corporation nForce PCI System Management
|-
| d000-d0ff || nVidia Corporation nForce AC'97 Audio
|-
| d200-d27f || nVidia Corporation nForce AC'97 Audio
|-
| e000-e007 || nVidia Corporation nForce Ethernet Controller
|-
| ff60-ff6f || nVidia Corporation nForce IDE
|}

= Emulation =
Code for emulating the memory might consist of:

<pre>
#ifdef DEBUG || CHIHIRO
#define MEMORY_SIZE 128 * 1024 * 1024
int mcpx_active = 0;
#else
#define MEMORY_SIZE 64 * 1024 * 1024
int mcpx_active = 1;
#endif

#define FLASH_SIZE 256 * 1024
#define FLASH_MAP_SIZE 16 * 1024 * 1024
#define FLASH_MAP_ADDRESS (0xFFFFFFFF - FLASH_MAP_SIZE + 1)

#define MCPX_SIZE 0x200
#define MCPX_MAP_ADDRESS (0xFFFFFFFF - MCPX_MAP_SIZE + 1)

uint8_t memory[MEMORY_SIZE] = {0};
uint8_t flash[FLASH_SIZE] = {0};
uint8_t mcpx[MCPX_SIZE] = {0};

uint8_t get_memory_byte(uint32_t location) {
if (location < MEMORY_SIZE) {
return memory[location];
}

if (mcpx_active && location >= MCPX_MAP_ADDRESS) {
return mcpx[location - MCPX_MAP_ADDRESS];
}

if (location >= FLASH_MAP_ADDRESS) {
return flash[(location - FLASH_MAP_ADDRESS) % FLASH_SIZE];
}

printf("Memory in unspecified range: %08X\n", location);
return 0;
}

uint16_t get_memory_word(uint32_t location) {
return get_memory_byte(location + 1) << 8 | get_memory_byte(location);
}

uint32_t get_memory_dword(uint32_t location) {
return get_memory_word(location + 2) << 16 | get_memory_word(location);
}

void deactivate_mcpx() {
mcpx_active = 0;
}
</pre>

I/O

2021-05-24T23:37:04Z

X86corez: Create a redirect. No pages link to this page actually.

#REDIRECT [[Memory]]

Memory

2021-05-24T23:36:44Z

X86corez: Add sections and move ports from I/O page here.

The Xbox has 64MB Memory. This could be expanded to 128MB of memory on boards of revision 1.0-1.4 (Boards of revision 1.0-1.4 have empty spots for the extra memory, but they were later removed on 1.6 boards) but no games took advantage of it. The debug Xbox and the Chihiro both contained 128MB Memory.

The memory was shared between the CPU and GPU. On the retail Xbox, the [[Flash ROM]] and [[MCPX ROM]] are also mapped to memory at the top 16 MiB and the top 512 Bytes respectively. However on Debug Xboxes and Chihiro, only the Flash is mapped as they don't contain an MCPX ROM.

= Memory map =
{| class="wikitable" style="text-align: center;"
! Memory Type
! Retail Xbox Range
! Debug/Chihiro Range
|-
|Main Memory
|0x00000000 - 0x03FFFFFF
|0x00000000 - 0x07FFFFFF
|-
|[[GPU|GPU (NV2A) Registers]]
|colspan="2"|0xFD000000 - 0xFDFFFFFF
|-
|[[APU|APU Registers]]
|colspan="2"|0xFE800000 - 0xFE87FFFF
|-
|ACI (AC97) Registers
|colspan="2"|0xFEC00000 - 0xFEC00FFF
|-
|USB 0 Registers
|colspan="2"|0xFED00000 - 0xFED00FFF
|-
|USB 1 Registers
|colspan="2"|0xFED08000 - 0xFED08FFF
|-
|NIC (NVNet) Registers
|colspan="2"|0xFEF00000 - 0xFEF003FF
|-
|[[Flash ROM]]
|colspan="2"|0xFF000000 - 0xFFFFFFFF
|-
|[[MCPX ROM]]
|0xFFFFFE00 - 0xFFFFFFFF
|N/A
|}

= I/O port map =
{{FIXME|reason=Taken from the KVMBOX memorymap.txt, not confirmed}}

{| class="wikitable"
! Ports || Purpose
|-
| 0000-001f || dma1
|-
| 0020-003f || pic1
|-
| 0040-0043 || timer0
|-
| 0050-0053 || timer1
|-
| 0060-006f || keyboard
|-
| 0070-007f || rtc
|-
| 0080-008f || dma page reg
|-
| 00a0-00bf || pic2
|-
| 00c0-00df || dma2
|-
| 00f0-00ff || fpu
|-
| 01f0-01f7 || ide0
|-
| 03c0-03df || vesafb
|-
| 03f6-03f6 || ide0
|-
| 0cf8-0cff || PCI conf1
|-
| 1000-100f || nVidia Corporation nForce PCI System Management
|-
| 1080-10ff || nVidia Corporation Intel 537 [nForce MC97 Modem]
|-
| 1400-14ff || nVidia Corporation Intel 537 [nForce MC97 Modem]
|-
| c000-c00f || nVidia Corporation nForce PCI System Management (amd756-smbus)
|-
| c200-c21f || nVidia Corporation nForce PCI System Management
|-
| d000-d0ff || nVidia Corporation nForce Audio
|-
| d200-d27f || nVidia Corporation nForce Audio
|-
| e000-e007 || nVidia Corporation nForce Ethernet Controller
|-
| ff60-ff6f || nVidia Corporation nForce IDE
|-
| ff60-ff67 || ide0
|}

= Emulation =
Code for emulating the memory might consist of:

<pre>
#ifdef DEBUG || CHIHIRO
#define MEMORY_SIZE 128 * 1024 * 1024
int mcpx_active = 0;
#else
#define MEMORY_SIZE 64 * 1024 * 1024
int mcpx_active = 1;
#endif

#define FLASH_SIZE 256 * 1024
#define FLASH_MAP_SIZE 16 * 1024 * 1024
#define FLASH_MAP_ADDRESS (0xFFFFFFFF - FLASH_MAP_SIZE + 1)

#define MCPX_SIZE 0x200
#define MCPX_MAP_ADDRESS (0xFFFFFFFF - MCPX_MAP_SIZE + 1)

uint8_t memory[MEMORY_SIZE] = {0};
uint8_t flash[FLASH_SIZE] = {0};
uint8_t mcpx[MCPX_SIZE] = {0};

uint8_t get_memory_byte(uint32_t location) {
if (location < MEMORY_SIZE) {
return memory[location];
}

if (mcpx_active && location >= MCPX_MAP_ADDRESS) {
return mcpx[location - MCPX_MAP_ADDRESS];
}

if (location >= FLASH_MAP_ADDRESS) {
return flash[(location - FLASH_MAP_ADDRESS) % FLASH_SIZE];
}

printf("Memory in unspecified range: %08X\n", location);
return 0;
}

uint16_t get_memory_word(uint32_t location) {
return get_memory_byte(location + 1) << 8 | get_memory_byte(location);
}

uint32_t get_memory_dword(uint32_t location) {
return get_memory_word(location + 2) << 16 | get_memory_word(location);
}

void deactivate_mcpx() {
mcpx_active = 0;
}
</pre>